我想将火箭芯片中的AsIDBits数量从0增加到8,我想知道如何才能实现这一目标。
平铺/BaseTile.Scala
trait HasNonDiplomaticTileParameters {
implicit val p: Parameters
//...
def asIdBits: Int = p(ASIdBits)
//...
}https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/tile/BaseTile.scala
我想实现一个类似于这里定义的类
子系统/Config.Scala
//...
class WithFPUWithoutDivSqrt extends Config((site, here, up) => {
case RocketTilesKey => up(RocketTilesKey, site) map { r =>
r.copy(core = r.core.copy(fpu = r.core.fpu.map(_.copy(divSqrt = false))))
}
})
class WithBootROMFile(bootROMFile: String) extends Config((site, here, up) => {
case BootROMLocated(x) => up(BootROMLocated(x), site).map(_.copy(contentFileName = bootROMFile))
})
class WithSynchronousRocketTiles extends Config((site, here, up) => {
case RocketCrossingKey => up(RocketCrossingKey, site) map { r =>
r.copy(crossingType = SynchronousCrossing())
}
})
//...https://github.com/chipsalliance/rocket-chip/blob/master/src/main/scala/subsystem/Configs.scala
我试过这么做
class SetAsIDBits(n: Int) extends Config(
(site, here, up) => {
case ASIdBits => n
}
)但是在下面列出了一个错误
Configs.scala:272:10: not found: value ASIdBits
[error] case ASIdBits => n
[error] ^
[error] one error found
[error] (Compile / compileIncremental) Compilation failed 发布于 2021-05-04 01:45:36
我认为这只是表明ASIdBits没有被定义。您可以尝试导入它:
import freechips.rocketchip.rocket.ASIdBitshttps://stackoverflow.com/questions/67338284
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