我的VHDL代码怎么了?以下是代码:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity main is
port(
-- 50 MHz clock
cp : in std_logic;
-- Reset signal
reset : in std_logic;
-- PS/2 data and clock lines
ps2d, ps2c : in std_logic;
-- 7-segment display segments
segments : out std_logic_vector (7 downto 0);
-- Anode control
an : out std_logic_vector (3 downto 0);
-- Data out to LEDs
dout : out std_logic_vector (7 downto 0)
);
end main;
architecture Behavioral of main is
-- Data from keyboard entity (scancode)
signal data : std_logic_vector (7 downto 0);
-- 7 segments of display
signal segReg, segNext : std_logic_vector (6 downto 0);
signal tickDone : std_logic;
begin
-- Just an entity that reads PS/2 keyboard data
-- rx_done is tick (20 ns)
S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
rx_done => tickDone, dout => data);
dout <= data;
an <= "1110";
segments(6 downto 0) <= segReg;
-- Turn off dot
segments(7) <= '1';
process (cp, reset)
begin
if reset = '1' then
segReg <= (others => '0');
elsif rising_edge (cp) then
segReg <= segNext;
end if;
end process;
process (tickDone, segReg)
begin
segNext <= segReg;
if tickDone = '1' then
if data = x"16" then
-- Number 1
segNext <= "1001111";
elsif data = x"1E" then
-- Number 2
segNext <= "0010010";
elsif data = x"26" then
-- Number 3
segNext <= "0000110";
elsif data = x"25" then
-- Number 4
segNext <= "1001100";
else
segNext <= "1111111";
end if;
end if;
end process;
end Behavioral;当我试图合成它/生成编程文件时,我会收到以下警告:
WARNING:Xst:819 - "C:/VHDL_projekti/PS2K/main.vhd" line 48: The following signals are missing in the process sensitivity list:
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Par:288 - The signal reset_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
WARNING:PhysDesignRules:367 - The signal <reset_IBUF> is incomplete. The signal我一直在看代码,我没有发现任何问题,但显然我做错了什么。
这段代码是我尝试使用带有PS/2启动板的斯巴达-3键盘。实体“键盘”进行读取,它正在正常工作(当我单独测试它时,我在dout信号上得到正确的扫描代码(我在LED上看到它)。rx_done是表示扫描代码已被成功读取的信号的勾选(20 Ns)。
因此,我只想看看我是否能以某种方式识别扫描代码(在我的第二个过程中,我比较数据信号并将正确的值与segNext信号进行比较),并在七段显示上显示一些东西。当我让它开始工作时,我将实现正确的行为(检测所有的扫描代码、额外的键、按键和按键事件)。
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity main is
port(
-- 50 MHz clock
cp : in std_logic;
-- Reset signal
reset : in std_logic;
-- PS/2 data and clock lines
ps2d, ps2c : in std_logic;
-- 7-segment display segments
segments : out std_logic_vector (7 downto 0);
-- Anode control
an : out std_logic_vector (3 downto 0);
-- Data out to LEDs
dout : out std_logic_vector (7 downto 0)
);
end main;
architecture Behavioral of main is
-- Data from keyboard entity (scancode)
signal data : std_logic_vector (7 downto 0);
-- 7 segments of display
signal segReg, segNext : std_logic_vector (6 downto 0);
signal tickDone : std_logic;
begin
-- Just entity that reads PS/2 keyboard data
-- rx_done is tick (20 ns)
S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
rx_done => tickDone, dout => data);
dout <= data;
an <= "1110";
segments(6 downto 0) <= segReg;
-- Turn off dot
segments(7) <= '1';
process (cp, reset)
begin
if reset = '1' then
segReg <= (others => '0');
elsif rising_edge (cp) then
segReg <= segNext;
end if;
end process;
process (tickDone, segReg, data)
begin
if tickDone = '1' then
if data = x"16" then
-- Number 1
segNext <= "1001111";
elsif data = x"1E" then
-- Number 2
segNext <= "0010010";
elsif data = x"26" then
-- Number 3
segNext <= "0000110";
elsif data = x"25" then
-- Number 4
segNext <= "1001100";
else
segNext <= "1111111";
end if;
else
segNext <= segReg;
end if;
end process;
end Behavioral;不幸的是,在这些编辑之后,我仍然有这样的警告:
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_6> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Par:288 - The signal reset_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.发布于 2012-03-09 22:14:02
2)“由于其他FF/舱口修整,块中的恒定值为0”好的,我做错了什么?我根本不想用闩锁.
这告诉您,这些存储元素是由常量驱动的,而不是锁存。你模拟过这个吗?
发布于 2012-03-07 15:22:17
在组合过程中,您正在阅读tickDone、segReg和data。后者在您的灵敏度列表中丢失,这将导致锁存。
另外,不要使用STD_LOGIC_ARITH或STD_LOGIC_UNSIGNED。它们不规范,有几个问题。http://parallelpoints.com/node/3
发布于 2012-03-06 23:31:32
您的第二个进程似乎试图使用tickDone作为时钟信号,但是您没有正确地使用它(例如: if rising_edge(tickDone)或类似的),因此您正在创建锁存器而不是触发器(如果tickDone='1')。使用锁存器时,虽然tickDone很高,但输出取决于数据信号的状态,而数据信号不在敏感列表中。最后,在敏感列表中使用segReg,按照编写代码的方式,您将segReg异步分配给segNext。
您是否忘记了使用cp信号作为时钟将第二个进程中的所有内容封装在if语句中?你写的这样会更有意义.
https://stackoverflow.com/questions/9592982
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