ARM设置缓存和从armasm到gnu arm汇编程序的mmu

Question

我正在尝试在树莓派2上运行一个裸机程序。我想设置缓存和内存管理单元，我指的是arm documentation。

首先，我使用FASMARM汇编程序编译我的代码。它可以在覆盆子pi 2上成功运行。

    @;enable cache
    @;Enables coherent requests to the processor
    MRC p15, 0, r1, c1, c0, 1
    ORR r1, r1, 0x40
    MCR p15, 0, r1, c1, c0, 1
    DSB
    ISB

    ;@ Disable MMU
    MRC p15, 0, r1, c1, c0, 0
    BIC r1, r1, #0x1
    MCR p15, 0, r1, c1, c0, 0
    DSB
    ISB

    ;@ Disable L1 Caches
    MRC p15, 0, r1, c1, c0, 0
    BIC r1, r1, 0x1000
    BIC r1, r1, 0x4
    MCR p15, 0, r1, c1, c0, 0
    DSB
    ISB

    ;@ Invalidate Instruction cache
    MOV r1, #0
    MCR p15, 0, r1, c7, c5, 0
    DSB
    ISB

    ;@ Invalidate Data cache
    MRC p15, 1, r0, c0, c0, 0
    MOV r3, 0x1ff
    AND r0, r3, r0, LSR #13
    MOV r1, #0
way_loop:
    MOV r3, #0
set_loop:
    MOV r2, r1, LSL #30
    ORR r2, r2, r3, LSL #5
    MCR p15, 0, r2, c7, c6, 2
    ADD r3, r3, #1
    CMP r0, r3
    BGE set_loop
    ADD r1, r1, #1
    CMP r1, #4
    BNE way_loop
    DSB
    ISB

    ;@ Invalidate TLB
    MCR p15, 0, r1, c8, c7, 0
    DSB
    ISB

    ;@ Branch Prediction Enable
    MOV r1, #0
    MRC p15, 0, r1, c1, c0, 0
    ORR r1, r1, 0x800
    MCR p15, 0, r1, c1, c0, 0
    DSB

    ;@ Enable L1 Data prefetch control
    MRC p15, 0, r1, c1, c0, 1
    ORR r1, r1, 0x6000
    MCR p15, 0, r1, c1, c0, 1
    DSB
    ISB

    ;@ Initialize PageTable
    MOV r0, 0xde2
    MOV r1, 0x00004000
    MOV r3, 0
    ORR r2, r0, r3, LSL #20
    STR r2, [r1]
    BIC r0, r0, 0xc
    ORR r0, r0, 0x4
    BIC r0, r0, 0x7000
    ORR r0, r0, 0x5000
    ORR r0, r0, 0x10000
    STR r0, [r1]
    DSB
    ISB

    ;@ Initialize MMU
    MOV r1, 0x0
    MCR p15, 0, r1, c2, c0, 2
    MOV r1, 0x00004000
    MCR p15, 0, r1, c2, c0, 0
    DSB
    ISB

    ;@ Set all Domains to Client
    mov r1, 0x5555
    movt r1, 0x5555
    MCR p15, 0, r1, c3, c0, 0
    DSB
    ISB

    ;@ Enable MMU
    MRC p15, 0, r1, c1, c0, 0
    ORR r1, r1, 0x1
    MCR p15, 0, r1, c1, c0, 0
    DSB
    ISB

    ;@ Enable cache
    MRC p15, 0, r1, c1, c0, 0
    ORR r1, r1, 0x4
    MCR p15, 0, r1, c1, c0, 0
    DSB
    ISB

    ;@ Enable I cache
    MRC p15, 0, r1, c1, c0, 0
    ORR r1, r1, 0x1000
    MCR p15, 0, r1, c1, c0, 0
    DSB
    ISB

   @; end enable cache

我需要将代码转换为可由GNU汇编程序编译的形式。然而，下面的代码不能在raspberry pi 2上运行。

    @; enable cache
    @; Enables coherent requests to the processor
     MRC p15, 0, r1, c1, c0, 1
     orr r1, r1, #0x40
     MCR p15, 0, r1, c1, c0, 1
     DSB
     ISB

    ;@ Disable MMU
     MRC p15, 0, r1, c1, c0, 0
     BIC r1, r1, #0x1
     MCR p15, 0, r1, c1, c0, 0
     DSB
     ISB
     ;@ Disable L1 Caches
     MRC p15, 0, r1, c1, c0, 0
     BIC r1, r1, #0x1000
     BIC r1, r1, #0x4 
     MCR p15, 0, r1, c1, c0, 0
     DSB  
     ISB

     ;@ Invalidate Instruction cache
     MOV r1, #0
     MCR p15, 0, r1, c7, c5, 0
     DSB
     ISB

     ;@ Invalidate Data cache
     MRC p15, 1, r0, c0, c0, 0
     LDR r3, =#0x1ff
     AND r0, r3, r0, LSR #13
     MOV r1, #0
 way_loop:
     MOV r3, #0
 set_loop:
     MOV r2, r1, LSL #30
     ORR r2, r2, r3, LSL #5
     MCR p15, 0, r2, c7, c6, 2
     ADD r3, r3, #1
     CMP r0, r3
     BGE set_loop
     ADD r1, r1, #1
     CMP r1, #4
     BNE way_loop
     DSB
     ISB

     ;@ Invalidate TLB
     MCR p15, 0, r1, c8, c7, 0
     DSB
     ISB

     ;@ Branch Prediction Enable
     MOV r1, #0
     MRC p15, 0, r1, c1, c0, 0
     ORR r1, r1, #0x800
     MCR p15, 0, r1, c1, c0, 0
     DSB
     ISB

    ;@ Enable L1 Data prefetch control
     MRC p15, 0, r1, c1, c0, 1
     ORR r1, r1, #0x6000
     MCR p15, 0, r1, c1, c0, 1
     DSB
     ISB

     ;@ Initialize PageTable
     LDR r0, =#0xde2
     MOV r1, #0x00004000
     MOV r3, #0
     ORR r2, r0, r3, LSL #20
     STR r2, [r1]
     BIC r0, r0, #0xc
     ORR r0, r0, #0x4
     BIC r0, r0, #0x7000
     ORR r0, r0, #0x5000
     ORR r0, r0, #0x10000
     STR r0, [r1]
     DSB
     ISB

     ;@ Initialize MMU
     MOV r1, #0x0
     MCR p15, 0, r1, c2, c0, 2
     MOV r1, #0x00004000
     MCR p15, 0, r1, c2, c0, 0
     DSB
     ISB

     ;@ Set all Domains to Client
     LDR r1, =#0x5555
     movt r1, #0x5555
     MCR p15, 0, r1, c3, c0, 0
     DSB
     ISB
     ;@ Enable MMU
     MRC p15, 0, r1, c1, c0, 0
     ORR r1, r1, #0x1
     MCR p15, 0, r1, c1, c0, 0
     DSB
     ISB

    ;@ Enable cache
     MRC p15, 0, r1, c1, c0, 0
     ORR r1, r1, #0x4
     MCR p15, 0, r1, c1, c0, 0
     DSB
     ISB

     ;@ Enable I cache
     MRC p15, 0, r1, c1, c0, 0
     ORR r1, r1, #0x1000
     MCR p15, 0, r1, c1, c0, 0
     DSB
     ISB

我不确定问题是否发生在启用mmu时，因为如果我注释掉enable mmu部分，代码就可以工作。

有人能帮帮我吗？

Answer 1

唯一看起来可能会有所不同的是文字加载的使用-因为汇编程序只在文件末尾转储文字池，所以执行有直接进入数据的风险：

...
 154:   e3811a01        orr     r1, r1, #4096   ; 0x1000
 158:   ee011f10        mcr     15, 0, r1, cr1, cr0, {0}
 15c:   f57ff04f        dsb     sy
 160:   f57ff06f        isb     sy
 164:   000001ff        .word   0x000001ff
 168:   00000de2        .word   0x00000de2
 16c:   00005555        .word   0x00005555

对于这些情况，最好将mov转换为显式的movw，而不是ldr=，以完全避免文字- GAS显然太愚蠢了，无法意识到统一语法期望mov使用16位立即数来自动选择movw编码；我猜FASMARM这样做是正确的。