Xilinx RLOC映射失败

Question

我尝试创建一个包含两个宽多路复用器的两级多路复用器。每个宽多路复用器具有8个2对1多路复用器，它们共享相同的选择信号。因为我可以使用RLOC将共享select信号的一个宽多路复用器(= 8个2对1多路复用器)打包到一个Virtex-5片中。我想把这两个宽的多路复用器打包成两片。但是下面的代码给出了一个映射错误:错误:Pack:679-无法遵守设计约束(MACRONAME=hset，RLOC=X2Y2)

有人知道怎么解决这个问题吗？

module mux_8(a, c, d, sel, o);
input [7:0] a;
input [7:0] d;
input [7:0] c;
input [1:0] sel;
output [7:0] o;

wire [7:0] b;

(* RLOC = "X0Y0" *)
mux mux_0(.a(a[0]), .b(b[0]), .sel(sel[0]), .o(o[0]));
(* RLOC = "X0Y0" *)
mux mux_1(.a(a[1]), .b(b[1]), .sel(sel[0]), .o(o[1]));
(* RLOC = "X0Y0" *)
mux mux_2(.a(a[2]), .b(b[2]), .sel(sel[0]), .o(o[2]));
(* RLOC = "X0Y0" *)
mux mux_3(.a(a[3]), .b(b[3]), .sel(sel[0]), .o(o[3]));
(* RLOC = "X0Y0" *)
mux mux_4(.a(a[4]), .b(b[4]), .sel(sel[0]), .o(o[4]));
(* RLOC = "X0Y0" *)
mux mux_5(.a(a[5]), .b(b[5]), .sel(sel[0]), .o(o[5]));
(* RLOC = "X0Y0" *)
mux mux_6(.a(a[6]), .b(b[6]), .sel(sel[0]), .o(o[6]));
(* RLOC = "X0Y0" *)
mux mux_7(.a(a[7]), .b(b[7]), .sel(sel[0]), .o(o[7]));

(* RLOC = "X2Y2" *)
mux mux_8 (.a(c[0]), .b(d[0]), .sel(sel[1]), .o(b[0]));
(* RLOC = "X2Y2" *)
mux mux_9 (.a(c[1]), .b(d[1]), .sel(sel[1]), .o(b[1]));
(* RLOC = "X2Y2" *)
mux mux_10(.a(c[2]), .b(d[2]), .sel(sel[1]), .o(b[2]));
(* RLOC = "X2Y2" *)
mux mux_11(.a(c[3]), .b(d[3]), .sel(sel[1]), .o(b[3]));
(* RLOC = "X2Y2" *)
mux mux_12(.a(c[4]), .b(d[4]), .sel(sel[1]), .o(b[4]));
(* RLOC = "X2Y2" *)
mux mux_13(.a(c[5]), .b(d[5]), .sel(sel[1]), .o(b[5]));
(* RLOC = "X2Y2" *)
mux mux_14(.a(c[6]), .b(d[6]), .sel(sel[1]), .o(b[6]));
(* RLOC = "X2Y2" *)
mux mux_15(.a(c[7]), .b(d[7]), .sel(sel[1]), .o(b[7]));

endmodule


(* LUT_MAP = "yes" *) 
module mux(a, b, sel, o);
input a;
input b;
input sel;
output o;

assign o = (~sel & a) | (sel & b);
endmodule

Answer 1

恐怕它报告说，不可能根据您的限制进行路由。您可以使用fpgaeditor (ISE中的工具)查看目标切片的路由资源。您可以尝试在fpgaeditor中手动路由它。如果可能，您可以将布线设计保存为硬marco，并在您的设计中使用marco。但是，我认为您在一个片中放了太多的多路复用器，这会导致无法处理的路由拥塞。