创建Makefile以一次编译%2个文件

Question

If I compile by hand, my code should be
gcc image.c -c
gcc stego.c -c
gcc image.c stego.c -o Stego

然后，我尝试创建一个Makefile来一次性编译所有内容。然而，它并不成功。我不知道这是怎么回事。你能给我一张照片吗。

GCC=gcc
all:Stegonew
Stegonew:stego.o image.o
        ${GCC} stego.o image.o -o Stegonew
stego.o: stego.c image.h
        ${GCC} stego.c -c
image.o:image.c
        ${GCC} image.c -c
clean:
      rm *.o Stegonew

Answer 1

notice that all indented lines are actual a single leading tab char
lots more could be added to this makefile to yield a more flexable result
but the following should do the job

* give full path use ':' so only evaluated once
* following path value is for linux
GCC := /usr/bin/gcc
RM  := /usr/bin/rm

* tell make that certain targets will not produce a file of the same name
.PHONY: all clean

* this target will be performed if user only enters 'make'
all:Stegonew

* link the executable, 
* are any libraries needed? 
* if so, set path by: '-Lpath' set library by '-llibname'
* where libname is missing leading 'lib' chars and trailing '.so' characters
* of actual library name
Stegonew:stego.o image.o
        ${GCC} stego.o image.o -o Stegonew

* compile the stego.c file, 
* '-I.' says to look for source code line: #include "image.h" in current directory
* '-c' says compile only
stego.o: stego.c image.h
        ${GCC} -c stego.c -o stego.o -I.

* compile the image.c file, 
* '-I.' says to look for source code line: #include "image.h" in current directory
* '-c' says compile only
image.o:image.c image.h
        ${GCC} -c image.c -o image.o -I.

* target for removing the re-producable files
* '-f' forces the removal without asking user for approval
clean:
        $(RM) -f *.o Stegonew